๋ณธ๋ฌธ ๋ฐ”๋กœ๊ฐ€๊ธฐ

๋ถ„๋ฅ˜ ์ „์ฒด๋ณด๊ธฐ199

[์šด์˜์ฒด์ œ] 9. Virtual Memory ๋ฌผ๋ฆฌ์ ์ธ ๋ฉ”๋ชจ๋ฆฌ ๋ณ€ํ™”๋Š” OS๊ฐ€ ๊ด€์—ฌํ•˜์ง€ ์•Š์ง€๋งŒ Virtual Memory ๋ณ€ํ™”๋Š” OS๊ฐ€ ๊ด€์—ฌํ•œ๋‹ค! * ๋Œ€๋ถ€๋ถ„ paging ๊ธฐ๋ฒ•์„ ์‚ฌ์šฉํ•œ๋‹ค๊ณ  ๊ฐ€์ • Demand Paging ์š”์ฒญ์ด ์žˆ์œผ๋ฉด ๊ทธ ๋•Œ page๋ฅผ ๋ฉ”๋ชจ๋ฆฌ์— ์˜ฌ๋ฆฌ๋Š” ๊ฒƒ - I/O ์–‘์˜ ๊ฐ์†Œ (ํ•œ์ •๋œ ๋ฉ”๋ชจ๋ฆฌ ๊ณต๊ฐ„์„ ๋” ์˜๋ฏธ์žˆ๋Š” ์ •๋ณด๋กœ ์ฑ„์šธ ์ˆ˜ ์žˆ์Œ) - Memory ์‚ฌ์šฉ๋Ÿ‰ ๊ฐ์†Œ - ๋น ๋ฅธ ์‘๋‹ต ์‹œ๊ฐ„ - ๋” ๋งŽ์€ ์‚ฌ์šฉ์ž ์ˆ˜์šฉ Valid / Invalid bit์˜ ์‚ฌ์šฉ * invalid๋ž€? - ์‚ฌ์šฉ๋˜์ง€ ์•Š๋Š” ์ฃผ์†Œ ์˜์—ญ์ธ ๊ฒฝ์šฐ - ํŽ˜์ด์ง€๊ฐ€ ๋ฌผ๋ฆฌ์  ๋ฉ”๋ชจ๋ฆฌ์— ์—†๋Š” ๊ฒฝ์šฐ - ์ฒ˜์Œ์—๋Š” ๋ชจ๋“  page๊ฐ€ invalid bit๋กœ ์ดˆ๊ธฐํ™” - address translation ์‹œ์— invalid bit์ด set๋˜์–ด ์žˆ์œผ๋ฉด page fault -> [trap] CPU๊ฐ€ OS๋กœ.. 2023. 1. 22.
[์šด์˜์ฒด์ œ] 8. Memory Management Logical vs Physical Address 1) Logical Address(virtual address) - ํ”„๋กœ์„ธ์Šค๋งˆ๋‹ค ๋…๋ฆฝ์ ์œผ๋กœ ๊ฐ€์ง€๋Š” ๊ฐ€์ƒ์˜ ์ฃผ์†Œ ๊ณต๊ฐ„ (CPU๊ฐ€ ๋ณด๋Š” ์ฃผ์†Œ) - ๊ฐ ํ”„๋กœ์„ธ์Šค๋งˆ๋‹ค 0๋ฒˆ์ง€๋ถ€ํ„ฐ ์‹œ์ž‘ 2) Physical Address - ๋ฉ”๋ชจ๋ฆฌ์— ์‹ค์ œ ์˜ฌ๋ผ๊ฐ€๋Š” ์œ„์น˜ * ์ฃผ์†Œ ๋ฐ”์ธ๋”ฉ - ํŠน์ • ์‹œ์Šคํ…œ์˜ Logical Addr๋ฅผ Physical Addr๋กœ ๋งคํ•‘ํ•˜๋Š” ๊ฒƒ (Symbolic addr(๋ณ€์ˆ˜/ํ•จ์ˆ˜๋กœ ํ˜ธ์ถœ) -> Logical addr -> Physical addr) ์ฃผ์†Œ ๋ฐ”์ธ๋”ฉ(Address binding) ์ฃผ์†Œ ๋ณ€ํ™˜์ด ์ด๋ฃจ์–ด์ง€๋Š” ์‹œ๊ธฐ์— ๋”ฐ๋ผ ๋ถ„๋ฅ˜ 1) Compile time binding - ์ปดํŒŒ์ผ ์‹œ ์ฃผ์†Œ ๋ณ€ํ™˜(Logical addr์„ ๊ทธ๋Œ€๋กœ ์‚ฌ์šฉ) -> ๋น„ํšจ์œจ์ ์ด๊ธฐ ๋•Œ๋ฌธ.. 2023. 1. 8.
[์šด์˜์ฒด์ œ] 7. Deadlocks Deadlock Problem 1) Deadlock : ์ผ๋ จ์˜ ํ”„๋กœ์„ธ์Šค๋“ค์ด ์„œ๋กœ๊ฐ€ ๊ฐ€์ง„ SW/HW ์ž์›์„ ๊ธฐ๋‹ค๋ฆฌ๋ฉฐ block๋œ ์ƒํƒœ 2) Resource : HW, SW ๋“ฑ์„ ํฌํ•จํ•˜๋Š” ๊ฐœ๋… - I/O device, CPU cycle, memory space, semaphore ๋“ฑ - ์ž์› ์‚ฌ์šฉ ์ ˆ์ฐจ : Request(์š”์ฒญ) > Allocate(ํ• ๋‹น) > Use(์‚ฌ์šฉ) > Release(๋ฐ˜๋‚ฉ) Deadlock์ด ๋ฐœ์ƒํ•˜๋Š” 4๊ฐ€์ง€ ์กฐ๊ฑด๐Ÿ”ฅ 1) Mutual Exclusion(์ƒํ˜ธ ๋ฐฐ์ œ) : ๋งค ์ˆœ๊ฐ„ ํ•˜๋‚˜์˜ ํ”„๋กœ์„ธ์Šค๋งŒ์ด ์ž์›์„ ์‚ฌ์šฉํ•  ์ˆ˜ ์žˆ์Œ 2) No preemption(๋น„์„ ์ ) : ํ”„๋กœ์„ธ์Šค๋Š” ์ž์›์„ ์Šค์Šค๋กœ ๋‚ด์–ด๋†“์„ ๋ฟ, ๊ฐ•์ œ๋กœ ๋นผ์•—๊ธฐ์ง€ ์•Š์Œ 3) Hold and wait(๋ณด์œ ๋Œ€๊ธฐ) : ์ž์›์„ ๊ฐ€์ง„ ํ”„๋กœ์„ธ์Šค๊ฐ€ .. 2023. 1. 1.
[์šด์˜์ฒด์ œ] 6. Process Synchronization ๊ณต์œ ๋ฐ์ดํ„ฐ ์ ‘๊ทผ do { entry section critical section exit section remainder section } while (1) ํ”„๋กœ๊ทธ๋žจ์  ํ•ด๊ฒฐ๋ฒ•์˜ ์ถฉ์กฑ ์กฐ๊ฑด 1) Mutual Exclusion(์ƒํ˜ธ ๋ฐฐ์ œ) ํŠน์ • ํ”„๋กœ์„ธ์Šค๊ฐ€ critical section์„ ์ˆ˜ํ–‰ ์ค‘์ด๋ฉด ๋‹ค๋ฅธ ๋ชจ๋“  ํ”„๋กœ์„ธ์Šค๋“ค์€ critical section์— ๋“ค์–ด๊ฐ€๋ฉด ์•ˆ ๋œ๋‹ค 2) Progress ์•„๋ฌด๋„ critical section์— ์žˆ์ง€ ์•Š์€ ์ƒํƒœ์—์„œ critical section์— ๋“ค์–ด๊ฐ€๊ณ ์ž ํ•˜๋Š” ํ”„๋กœ์„ธ์Šค๊ฐ€ ์žˆ๋‹ค๋ฉด critical section์— ๋“ค์–ด๊ฐ€๊ฒŒ ํ•ด์ฃผ์–ด์•ผ ํ•œ๋‹ค. 3) Bounded Waiting(์œ ํ•œ ๋Œ€๊ธฐ) ํ”„๋กœ์„ธ์Šค๊ฐ€ critical section์— ๋“ค์–ด๊ฐ€๋ ค๊ณ  ์š”์ฒญํ•œ ํ›„๋ถ€ํ„ฐ ๊ทธ ์š”์ฒญ์ด ํ—ˆ์šฉ๋  ๋•Œ๊นŒ์ง€.. 2022. 12. 25.